Intel's plans, announced Tuesday, to spend $20 billion to build new chip-making factories aimed to show that the company, and the US, are serious about regaining global leadership in a crucial technology. But the news also highlighted how far Intel, and the US, have fallen behind. As part of its plan, Intel said it would open its factories more widely to make chips for other companies, highlighting its manufacturing expertise and ambition. But at the same time, Intel said it would outsource production of some of its most advanced chips to Taiwan Semiconductor Manufacturing Company. TSMC is ahead of Intel in using extreme ultraviolet lithography (EUV) to put more computer power on a chip by squeezing transistors closer together.

Markets are subject to fads and the embedded-control sector is far from immune to them. In the 1990s, fuzzy logic seemed to be the way forward and microcontroller (MCU) vendors scrambled to put support into their offerings only to see it flame out. Embedded machine learning (ML) is seeing a far bigger feeding frenzy as established MCU players and AI-acceleration start-ups try to demonstrate their commitment to the idea, which mostly goes under the banner of TinyML. Daniel Situnayake, founding TinyML engineer at software-tools company Edge Impulse and co-author of a renowned book on the technology, says the situation today is very different to that of the 1990s. "The exciting thing about embedded ML is that machine learning and deep learning are not new, unproven technologies - they've in fact been deployed successfully on server-class computers for a relatively long time, and are at the heart of a ton of successful products. Embedded ML is about applying a proven set of technologies to a new context that will enable many new applications that were not previously possible."

Several companies are developing or ramping up AI chips for systems on the network edge, but vendors face a variety of challenges around process nodes and memory choices that can vary greatly from one application to the next. The network edge involves a class of products ranging from cars and drones to security cameras, smart speakers and even enterprise servers. All of these applications incorporate low-power chips running machine learning algorithms. While these chips have many of the same components as other digital chips, a key difference is that the bulk of the processing is done in or near the memory. With that in mind, the makers of AI edge chips are evaluating different types of memory for their next devices. Each comes with its own set of challenges. In addition, the chips themselves must incorporate low-power architectures, despite the fact that in many cases they are using mature processes rather than the most advanced nodes. AI chips -- sometimes called deep-learning accelerators or processors -- are optimized to handle various workloads in systems using machine learning. A subset of AI, machine learning utilizes a neural network to crunch data and identify patterns.

Today the Linley Group released its latest Microprocessor Report titled "Groq Rocks Neural Networks", which concludes that Groq's "TSP stands out in both peak performance and ResNet-50 throughput," and that "Groq's [deep-learning] accelerator is the fastest available on the merchant market." The Linley Group's report provides the most detailed overview of the novel Groq architecture available to date. In the few weeks since our interview with the Linley Group, we've been able to improve the performance of our ResNet-50 v2 implementation. The TSP can now reach 21,700 IPS (core compute) for Resnet-50 running at 900 MHz. Groq's level of inference performance exceeds that of other commercially available neural network architectures, with throughput that more than doubles the ResNet-50 score of the incumbent GPU-based architecture.

The Linley Fall Processor Conference was held on October 23 - 24 at the Hyatt Regency Hotel in Santa Clara, CA. Proceedings are now available at the link above. Click here to view the keynotes on our Youtube channel. The conference presentations featured AI acceleration, targeting edge, automotive, IoT, and data center. Also covered were new CPU architectures, networking, memory, security, SoC design, and other processor-related topics.

Neural networks are graph-based applications with opportunities to execute many graph nodes concurrently. Recent architectures have responded with massively parallel systems, but scheduling them has proved challenging, often relying on an oracle compiler. Instead, Mythic created an architecture that works on graphs directly: producer/consumer relationships are hardware concepts, and parallel execution happens automagically when dependencies are met. This presentation discloses a high-level overview of the architecture and how it can efficiently achieve parallelism on a wide variety of neural networks.

In a video introducing the iPhone X, Apple design chief Jony Ive speaks in his usual sonorous tones about features like polished stainless steel and new formulations of glass. Twice, he also calls out a feature of the $999 device that its owners will never see: the A11 "bionic" processor powering the phone. The new chip's prominence reflects Apple's deepening investment in chip design. Last week the company also revealed it had built new custom chips or chip components for artificial intelligence, graphics, and video. And Apple highlighted two new chips in its refreshed smartwatch, suggesting they helped the company add a cellular connection to the device without hurting its battery life.